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You are here: Home / News / GCRI Affiliated Faculty JV Rajendran selected for “Best Practices for Cybersecurity and Physical Security in Semiconductor Supply Chains”

GCRI Affiliated Faculty JV Rajendran selected for “Best Practices for Cybersecurity and Physical Security in Semiconductor Supply Chains”

May 20, 2024

Dr. Jeyavijayan JV Rajendran has been selected to participate in a planning committee that will work with regional partners to organize a series of workshops in Latin America and Southeast Asia in identifying and promoting the adoption of strategies, best practices, policies, and resources for cybersecurity and physical security in semiconductor supply chains.

ECEN Professor JV Rejendran
Jeyavijayan “JV” Rajendran Associate Professor, Electrical & Computer Engineering ASCEND Fellow Joint Faculty in: Computer Engineering

From research and development to packaging, each regional series will consist of two virtual workshops, followed by an in-person workshop. Workshop participants will share experience and insights on cyber and physical threats to the semiconductor manufacturing ecosystem, including design know-how, software and hardware toolchain, intellectual property, and supply chain security, and strategies for addressing these threats.

Workshop participants will share

(1) experience and insights on cyber and physical threats to the semiconductor manufacturing ecosystem, including design know-how, software and hardware toolchain, intellectual property, and supply chain security,

(2) strategies, best practices, policies, and resources for addressing these threats, and

(3) opportunities for improvement in responsible management and development of expertise, digital resources, facilities, and personnel, interactions and partnerships with other actors in the supply chain, and risk assessment and risk-management approaches.

Each regional workshop series will result in a rapporteur-written proceedings.

Filed Under: News

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